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breadboard-logic/presentation.tex

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\documentclass{beamer}
%
% Choose how your presentation looks.
%
% For more themes, color themes and font themes, see:
% http://deic.uab.es/~iblanes/beamer_gallery/index_by_theme.html
%
\mode<presentation>
{
\usetheme{Singapore} % or try Darmstadt, Madrid, Warsaw, ...
\usecolortheme[RGB={3,138,94}]{structure}
\usefonttheme{structurebold} % or try serif, structurebold, ...
\setbeamertemplate{navigation symbols}{}
\setbeamertemplate{headline}{}
%\setbeamertemplate{caption}[numbered]
\setbeamertemplate{footline}[frame number]
}
\usepackage[english]{babel}
\usepackage[utf8x]{inputenc}
\usepackage{fancyvrb}
\usepackage{tcolorbox,listings}
\usepackage{textpos}
\usepackage{setspace}
\usepackage{circuitikzgit}
\usetikzlibrary{positioning}
% Default fixed font does not support bold face
\DeclareFixedFont{\ttb}{T1}{ascii}{m}{n}{7} % for bold
\DeclareFixedFont{\ttm}{T1}{ascii}{m}{n}{7} % for normal
% Custom colors
\usepackage{color}
\definecolor{deepblue}{rgb}{0,0,0.5}
\definecolor{deepred}{rgb}{0.6,0,0}
\definecolor{deepgreen}{rgb}{0,0.5,0}
\definecolor{lightblue}{rgb}{0.6,0.8,1.0}
\definecolor{teal}{rgb}{0.45,0.85,1.0}
\fvset{frame=single,framesep=1mm,fontfamily=courier,fontsize=\scriptsize,framerule=.3mm,numbersep=1mm,commandchars=\\\{\}}
\usepackage{color}
\tcbuselibrary{listings,skins,breakable}
\lstdefinestyle{commandline}{
basicstyle=\ttfamily\scriptsize,
numbers=none,
keywordstyle=\color{blue},
morekeywords={{git add}},
%numberstyle=\tiny,
numbersep=2pt,
moredelim=**[is][\color{darkgreen}]{_green_}{_green_},
moredelim=**[is][\color{red}]{_red_}{_red_},
moredelim=**[is][\color{blue}]{_blue_}{_blue_},
}
% Python style for highlighting
\newcommand\pythonstyle{
\lstset{
language=Python,
basicstyle=\ttfamily\color{white}\tiny,
otherkeywords={self}, % Add keywords here
keywordstyle=\ttfamily\color{lightblue},
commentstyle=\ttfamily\color{teal},
emph={MyClass,__init__}, % Custom highlighting
emphstyle=\ttfamily\color{deepred}, % Custom highlighting style
stringstyle=\ttfamily\color{red},
frame=tb, % Any extra options here
backgroundcolor = \color{black},
showstringspaces=false %
}}
\newtcblisting{ConsoleVerbatim}{
arc=0mm,
top=-2mm,
bottom=-2mm,
left=0mm,
right=0mm,
width=\textwidth,
boxrule=0.5pt,
colupper=white,
colback=black,
spartan,
listing only,
listing options={style=commandline},
breakable
}
% Python environment
\lstnewenvironment{python}[1][]
{
\pythonstyle
\lstset{#1}
}
{}
\lstdefinestyle{commandline}{
basicstyle=\ttfamily\tiny,
numbers=none,
keywordstyle=\color{blue},
morekeywords={{git add}},
%numberstyle=\tiny,
numbersep=2pt,
moredelim=**[is][\color{darkgreen}]{_green_}{_green_},
moredelim=**[is][\color{red}]{_red_}{_red_},
moredelim=**[is][\color{blue}]{_blue_}{_blue_},
}
\newtcblisting{ConsoleVerbatimTiny}{
arc=0mm,
top=-2mm,
bottom=-2mm,
left=0mm,
right=0mm,
width=\textwidth,
boxrule=0.5pt,
colupper=white,
colback=black,
spartan,
listing only,
listing options={style=commandline},
breakable
}
\newenvironment{reference}[2]{ %
\begin{textblock*}{\textwidth}(#1,#2) %
\rule{10cm}{0.5pt}\\
\tiny\bgroup\color{black}}{\egroup % for the emulated
\end{textblock*}}
\usepackage{hyperref}
\definecolor{darkgreen}{rgb}{0.0,0.5,0.0}
\title[LoRa]{Breadboard logic}
\date{January 13th, 2020}
\AfterPreamble{\hypersetup{
urlcolor=blue,
}}
\begin{document}
\begin{frame}
\titlepage
\end{frame}
% Uncomment these lines for an automatically generated outline.
\begin{frame}{Outline}
\tableofcontents
\end{frame}
\section{Boolean logic and basic gates}
\begin{frame}{Basic logic operation}
\begin{itemize}
\item Two states \textbf{TRUE} and \textbf{FALSE}
(also written as \textbf{1} and \textbf{0})
\item Boolean logic describes logical operations
\begin{minipage}{0.5\textwidth}
\item \textbf{NOT}
\begin{tabular}{c|c}
A & Y\\
\hline
0 & 1 \\
1 & 0
\end{tabular}
\item \textbf{AND}
\begin{tabular}{cc|c}
A & B & Y\\
\hline
0 & 0 & 0 \\
1 & 0 & 0 \\
0 & 1 & 0 \\
1 & 1 & 1 \\
\end{tabular}
\item \textbf{OR}
\begin{tabular}{cc|c}
A & B & Y\\
\hline
0 & 0 & 0 \\
1 & 0 & 1 \\
0 & 1 & 1 \\
1 & 1 & 1 \\
\end{tabular}
\end{minipage}%
\begin{minipage}{0.5\textwidth}
\item \textbf{XOR}
\begin{tabular}{cc|c}
A & B & Y\\
\hline
0 & 0 & 0 \\
1 & 0 & 1 \\
0 & 1 & 1 \\
1 & 1 & 0 \\
\end{tabular}
\item \textbf{NAND}
\begin{tabular}{cc|c}
A & B & Y\\
\hline
0 & 0 & 1 \\
1 & 0 & 1 \\
0 & 1 & 1 \\
1 & 1 & 0 \\
\end{tabular}
\end{minipage}
\item In electronics boolean states are represented by different voltage levels, e.g.~\textbf{FALSE} = 0 V, \textbf{TRUE} = 5 V
\end{itemize}
\end{frame}
\begin{frame}{Breadboard}
\vspace{1cm}
\begin{overlayarea}{\textwidth}{\textheight}
\begin{flushleft}
\includegraphics[scale=0.45]{images/Breadboard.jpg}\\
\includegraphics<2>[scale=0.5]{images/Breadboard-Pinout.png}
\end{flushleft}
\end{overlayarea}
\end{frame}
\begin{frame}{NOT gate (inverter)}
\begin{minipage}{0.6\textwidth}
\only<1>{
\begin{circuitikz}
\draw (0,0) node[vcc](VCC){5 V};
\draw (-1, -3) node (TL) {};
\draw (1, -3) node (TR) {};
\draw ($(TL)!0.5!(TR)$) node (INT1) {};
\draw (-1, -5) node (BL) {};
\draw (1, -5) node (BR) {};
\draw ($(BL)!0.5!(BR)$) node (INT2) {};
\draw (0, -6) node[ground](GND) {};
\draw ($(TL)!0.5!(BL)$) node[pushbuttonshape,rotate=90](P1) {};
\draw ([xshift=-0.3cm]P1) node[] (A) {};
\draw ($(TR)!0.5!(BR)$) node[emptylediodeshape, rotate=-90](B) {};
\draw (VCC) to[R] (INT1.center);
\draw (INT1.center) -- (TL.center);
\draw (INT1.center) -- (TR.center);
\draw (TL.center) -- (P1) (P1) -- (BL.center);
\draw (TR.center) -- (B) -- (BR.center);
\draw (BR.center) -- (INT2.center);
\draw (BL.center) -- (INT2.center);
\draw (INT2.center) -- (GND);
\node[left] at (A) {\textbf{A}};
\node[left] at (B.south) {\textbf{Y}};
\end{circuitikz}
}
\only<2>{
\begin{circuitikz}
\draw (0,0) node[vcc](VCC){5 V};
\draw (-1, -3) node (TL) {};
\draw (1, -3) node (TR) {};
\draw ($(TL)!0.5!(TR)$) node (INT1) {};
\draw (-1, -5) node (BL) {};
\draw (1, -5) node (BR) {};
\draw ($(BL)!0.5!(BR)$) node (INT2) {};
\draw (0, -6) node[ground](GND) {};
\draw ($(TL)!0.5!(BL)$) node[npn](P1) {};
\draw ([xshift=-3cm]P1) node[] (A) {};
\draw ($(TR)!0.5!(BR)$) node[emptylediodeshape, rotate=-90](B) {};
\draw (VCC) to[R] (INT1.center);
\draw (INT1.center) -- (TL.center);
\draw (INT1.center) -- (TR.center);
\draw (TL.center) -- (P1.C) (P1.E) -- (BL.center);
\draw (TR.center) -- (B) -- (BR.center);
\draw (BR.center) -- (INT2.center);
\draw (BL.center) -- (INT2.center);
\draw (INT2.center) -- (GND);
\draw (A) to[R,o-] (P1.B);
\node[left] at (A) {\textbf{A}};
\node[left] at (B.south) {\textbf{Y}};
\end{circuitikz}
}
\only<3->{
\begin{circuitikz}
\draw (0,0) node[vcc](VCC){5 V};
\draw (-1, -3) node (TL) {};
\draw (1, -3) node (TR) {};
\draw ($(TL)!0.5!(TR)$) node (INT1) {};
\draw (-1, -5) node (BL) {};
\draw (1, -5) node (BR) {};
\draw ($(BL)!0.5!(BR)$) node (INT2) {};
\draw (0, -6) node[ground](GND) {};
\draw ($(INT1)!0.5!(INT2)$) node[npn](P1) {};
\draw ([xshift=-3cm]P1) node[] (A) {};
\draw (VCC) to[R] (INT1.center);
\draw (INT1.center) to[short,-o] (TR.center);
\draw (INT1.center) -- (P1.C);
\draw (P1.E) -- (INT2.center);
\draw (INT2.center) -- (GND);
\draw (A) to[R,o-] (P1.B);
\node[left] at (A) {\textbf{A}};
\node[right] at (TR.center) {\textbf{Y}};
\end{circuitikz}
}
\end{minipage}%
\begin{minipage}{0.4\textwidth}
\begin{tabular}{c|c}
A & Y\\
\hline
0 & 1 \\
1 & 0
\end{tabular}\\[1cm]
\onslide<3>{
{Symbol}:\\
\begin{circuitikz}
\draw (0,0) node[not port] (NOT) {};
\draw (NOT.in) ++ (-1,0) node (A) {};
\draw (NOT.out) ++ (1,0) node (Y) {};
\draw (NOT.in) to[short,-o] (A);
\draw (NOT.out) to[short,-o] (Y);
\node[left] at (A) {\textbf{A}};
\node[right] at (Y) {\textbf{Y}};
\end{circuitikz}
}
\end{minipage}
\end{frame}
\begin{frame}{AND gate}
\begin{overlayarea}{\textwidth}{\textheight}
\begin{minipage}{0.6\textwidth}
\only<1>{
\hspace{2.5cm}
\begin{circuitikz}
\draw (0,0) node[vcc](VCC){5 V};
\draw (0,-1) node[pushbuttonshape,rotate=90](A) {\textbf{A}};
\draw (0,-2.5) node[pushbuttonshape,rotate=90](B) {\textbf{B}};
\draw (0,-4.5) node[](Y) {};
\draw (0, -6) node[ground](GND) {};
\draw (VCC) -- (A.east) (A.west) -- (B.east) (B.west) to[empty led,name=OUT] (Y) to[R] (GND);
\node[left] at (OUT.south) {\textbf{Y}};
\end{circuitikz}
}
\only<2>{
\begin{circuitikz}
\draw (0,0) node[vcc](VCC){5 V};
\draw (-3, -1) node (A) {};
\draw (-3, -2.5) node (B) {};
\draw (0,-1) node[npn](P1) {};
\draw (0,-2.5) node[npn](P2) {};
\draw (0, -6) node[ground](GND) {};
\draw (A) to[R,o-] (P1.B);
\draw (B) to[R,o-] (P2.B);
\draw (VCC) -- (P1.C) (P1.E) -- (P2.C) (P2.E) to[empty led, name=OUT] (0,-4.5) to[R] (GND);
\node[left] at (A) {\textbf{A}};
\node[left] at (B) {\textbf{B}};
\node[right] at (OUT.nw) {\textbf{Y}};
\end{circuitikz}
}
\only<3->{
\begin{circuitikz}
\draw (0,0) node[vcc](VCC){5 V};
\draw (-3, -1) node (A) {};
\draw (-3, -2.5) node (B) {};
\draw (1, -4) node (Y) {};
\draw (0,-1) node[npn](P1) {};
\draw (0,-2.5) node[npn](P2) {};
\draw (0, -6) node[ground](GND) {};
\draw (A) to[R,o-] (P1.B);
\draw (B) to[R,o-] (P2.B);
\draw (VCC) -- (P1.C) (P1.E) -- (P2.C) (P2.E) -- (0,-4.5) to[R] (GND);
\draw (0,-4) to[short,-o] (Y);
\node[left] at (A) {\textbf{A}};
\node[left] at (B) {\textbf{B}};
\node[right] at (Y) {\textbf{Y}};
\end{circuitikz}
}
\end{minipage}%
\begin{minipage}{0.4\textwidth}
\begin{tabular}{cc|c}
A & B & Y\\
\hline
0 & 0 & 0 \\
1 & 0 & 0 \\
0 & 1 & 0 \\
1 & 1 & 1 \\
\end{tabular}\\[1cm]
\onslide<4>{
{Symbol}:\\
\begin{circuitikz}
\draw (0,0) node[and port] (AND) {};
\draw (AND.in 1) ++ (-1,0) node (A) {};
\draw (AND.in 2) ++ (-1,0) node (B) {};
\draw (AND.out) ++ (1,0) node (Y) {};
\draw (AND.in 1) to[short,-o] (A);
\draw (AND.in 2) to[short,-o] (B);
\draw (AND.out) to[short,-o] (Y);
\node[left] at (A) {\textbf{A}};
\node[left] at (B) {\textbf{B}};
\node[right] at (Y) {\textbf{Y}};
\end{circuitikz}
}
\end{minipage}
\end{overlayarea}
\end{frame}
\begin{frame}{OR gate}
\begin{overlayarea}{\textwidth}{\textheight}
\begin{minipage}{0.6\textwidth}
\only<1>{
\begin{circuitikz}
\draw (0,0) node[vcc](VCC){5 V};
\draw (0, -6) node[ground](GND) {};
\draw (-1, -1.0) node (TL) {};
\draw (1, -1.0) node (TR) {};
\draw ($(TL)!0.5!(TR)$) node (INT1) {};
\draw (-1, -3.5) node (BL) {};
\draw (1, -3.5) node (BR) {};
\draw ($(BL)!0.5!(BR)$) node (INT2) {};
\node (Y) at ($(INT2)!0.5!(GND)$) {};
\draw ($(TL)!0.3!(BL)$) node[npn](P1) {};
\draw ([xshift=-3cm]P1) node[] (A) {};
\draw ($(TR)!0.7!(BR)$) node[npn](P2) {};
\draw ([xshift=-5cm]P2) node (B) {};
\draw (VCC) -- (INT1.center);
\draw (INT1.center) -- (TL.center);
\draw (INT1.center) -- (TR.center);
\draw (TL.center) -- (P1.C) (P1.E) -- (BL.center);
\draw (TR.center) -- (P2.C) (P2.E) -- (BR.center);
\draw (BR.center) -- (INT2.center);
\draw (BL.center) -- (INT2.center);
\draw (INT2.center) to[empty led, name=OUT] (Y) to [R] (GND);
\draw (A) to[R,o-] (P1.B);
\draw (B) to[R,o-] (P2.B);
\node[left] at (A) {\textbf{A}};
\node[left] at (B) {\textbf{B}};
\node[left] at (OUT.south) {\textbf{Y}};
\end{circuitikz}
}
\only<2->{
\begin{circuitikz}
\draw (0,0) node[vcc](VCC){5 V};
\draw (0, -6) node[ground](GND) {};
\draw (-1, -1.0) node (TL) {};
\draw (1, -1.0) node (TR) {};
\draw ($(TL)!0.5!(TR)$) node (INT1) {};
\draw (-1, -3.5) node (BL) {};
\draw (1, -3.5) node (BR) {};
\draw ($(BL)!0.5!(BR)$) node (INT2) {};
\node (Y) at ($(INT2)!0.5!(GND)$) {};
\draw (Y.north) ++ (1,0) node (OUT) {};
\draw ($(TL)!0.3!(BL)$) node[npn](P1) {};
\draw ([xshift=-3cm]P1) node[] (A) {};
\draw ($(TR)!0.7!(BR)$) node[npn](P2) {};
\draw ([xshift=-5cm]P2) node (B) {};
\draw (VCC) -- (INT1.center);
\draw (INT1.center) -- (TL.center);
\draw (INT1.center) -- (TR.center);
\draw (TL.center) -- (P1.C) (P1.E) -- (BL.center);
\draw (TR.center) -- (P2.C) (P2.E) -- (BR.center);
\draw (BR.center) -- (INT2.center);
\draw (BL.center) -- (INT2.center);
\draw (INT2.center) -- (Y.center) to [R] (GND);
\draw (A) to[R,o-] (P1.B);
\draw (B) to[R,o-] (P2.B);
\node[left] at (A) {\textbf{A}};
\node[left] at (B) {\textbf{B}};
\draw (Y.north) to[short,-o] (OUT);
\node[right] at (OUT) {\textbf{Y}};
\end{circuitikz}
}
\end{minipage}%
\begin{minipage}{0.4\textwidth}
\begin{tabular}{cc|c}
A & B & Y\\
\hline
0 & 0 & 0 \\
1 & 0 & 1 \\
0 & 1 & 1 \\
1 & 1 & 1 \\
\end{tabular} \\[1cm]
\onslide<3>{{Symbol}:\\
\begin{circuitikz}
\draw (0,0) node[or port] (OR) {};
\draw (OR.in 1) ++ (-1,0) node (A) {};
\draw (OR.in 2) ++ (-1,0) node (B) {};
\draw (OR.out) ++ (1,0) node (Y) {};
\draw (OR.in 1) to[short,-o] (A);
\draw (OR.in 2) to[short,-o] (B);
\draw (OR.out) to[short,-o] (Y);
\node[left] at (A) {\textbf{A}};
\node[left] at (B) {\textbf{B}};
\node[right] at (Y) {\textbf{Y}};
\end{circuitikz}
}
\end{minipage}%
\end{overlayarea}
\end{frame}
\begin{frame}{NAND gate}
\begin{overlayarea}{\textwidth}{\textheight}
\begin{minipage}{0.6\textwidth}
\begin{circuitikz}
\draw (0,0) node[vcc](VCC){5 V};
\draw (-3, -3) node (A) {};
\draw (-3, -4.5) node (B) {};
\draw (2, -1.75) node (Y) {};
\draw (0,-3) node[npn](P1) {};
\draw (0,-4.5) node[npn](P2) {};
\draw (0, -5.5) node[ground](GND) {};
\draw (A) to[R,o-] (P1.B);
\draw (B) to[R,o-] (P2.B);
\draw (VCC) to[R] (0,-1.75) -- (P1.C) (P1.E) -- (P2.C) (P2.E) -- (GND);
\draw (0,-1.75) to[short,-o] (Y);
\node[left] at (A) {\textbf{A}};
\node[left] at (B) {\textbf{B}};
\node[right] at (Y) {\textbf{Y}};
\end{circuitikz}
\end{minipage}%
\begin{minipage}{0.4\textwidth}
\begin{tabular}{cc|c}
A & B & Y\\
\hline
0 & 0 & 1 \\
1 & 0 & 1 \\
0 & 1 & 1 \\
1 & 1 & 0 \\
\end{tabular}\\[1cm]
{Symbol}:
\begin{circuitikz}
\draw (0,0) node[nand port] (AND) {};
\draw (AND.in 1) ++ (-1,0) node (A) {};
\draw (AND.in 2) ++ (-1,0) node (B) {};
\draw (AND.out) ++ (1,0) node (Y) {};
\draw (AND.in 1) to[short,-o] (A);
\draw (AND.in 2) to[short,-o] (B);
\draw (AND.out) to[short,-o] (Y);
\node[left] at (A) {\textbf{A}};
\node[left] at (B) {\textbf{B}};
\node[right] at (Y) {\textbf{Y}};
\end{circuitikz}
\end{minipage}
\end{overlayarea}
\end{frame}
\begin{frame}{Building some gates with other gates}
\textbf{XOR gate}\\
\begin{minipage}{0.6\textwidth}
\begin{circuitikz}
\draw (0,0) node[or port] (OR) {{\hspace*{-0.25cm}\tiny OR}};
\draw (0,2) node[nand port] (NAND) {{\hspace*{-0.5cm}\tiny NAND}};
\draw (2, 1) node[and port] (AND) {{\hspace*{-0.5cm}\tiny AND}};
\draw (OR.in 1) ++ (-1,0) node (A) {};
\draw (OR.in 2) ++ (-1,0) node (B) {};
\draw (AND.out) ++ (0.5,0) node (Y) {};
\draw (A) to[short, o-] (OR.in 1);
\draw (B) to[short, o-] (OR.in 2);
\draw (OR.in 1) ++ (-0.5,0) to[short,*-] ([xshift=-0.5cm]NAND.in 1) -- (NAND.in 1);
\draw (OR.in 2) ++ (-0.3,0) to[short,*-] ([xshift=-0.3cm]NAND.in 2) -- (NAND.in 2);
\draw (NAND.out) |- (AND.in 1);
\draw (OR.out) |- (AND.in 2);
\draw (AND.out) to[short,-o] (Y);
\node[left] at (A) {\textbf{A}};
\node[left] at (B) {\textbf{B}};
\node[right] at (Y) {\textbf{Y}};
\end{circuitikz}
\onslide<2->{
\\Alternatively using only \textbf{NAND} gates:
\begin{circuitikz}
\draw (0,0) node[nand port] (NAND1) {{\hspace*{-0.5cm}\tiny NAND}};
\draw (2,1) node[nand port] (NAND2) {{\hspace*{-0.5cm}\tiny NAND}};
\draw (2,-1) node[nand port] (NAND3) {{\hspace*{-0.5cm}\tiny NAND}};
\draw (4,0) node[nand port] (NAND4) {{\hspace*{-0.5cm}\tiny NAND}};
\draw (NAND2.in 1) ++ (-2.5,0) node (A) {};
\draw (NAND3.in 2) ++ (-2.5,0) node (B) {};
\draw (NAND4.out) ++ (0.5,0) node (Y) {};
\draw (A) to[short, o-] (NAND2.in 1);
\draw (B) to[short, o-] (NAND3.in 2);
\draw (A) ++ (0.5,0) to[short,*-] (NAND1.in 1);
\draw (B) ++ (0.5,0) to[short,*-] (NAND1.in 2);
\draw (NAND1.out) |- (NAND2.in 2);
\draw (NAND1.out) |- (NAND3.in 1);
\draw (NAND2.out) |- (NAND4.in 1);
\draw (NAND3.out) |- (NAND4.in 2);
\draw (NAND4.out) to[short,-o] (Y);
\node[left] at (A) {\textbf{A}};
\node[left] at (B) {\textbf{B}};
\node[right] at (Y) {\textbf{Y}};
\end{circuitikz}
}
\end{minipage}%
\begin{minipage}{0.4\textwidth}
\begin{tabular}{cc|c}
A & B & Y\\
\hline
0 & 0 & 0 \\
1 & 0 & 1 \\
0 & 1 & 1 \\
1 & 1 & 0 \\
\end{tabular}\\[3cm]
\onslide<3>{
{Symbol}:
\begin{circuitikz}
\draw (0,0) node[xor port] (AND) {};
\draw (AND.in 1) ++ (-1,0) node (A) {};
\draw (AND.in 2) ++ (-1,0) node (B) {};
\draw (AND.out) ++ (1,0) node (Y) {};
\draw (AND.in 1) to[short,-o] (A);
\draw (AND.in 2) to[short,-o] (B);
\draw (AND.out) to[short,-o] (Y);
\node[left] at (A) {\textbf{A}};
\node[left] at (B) {\textbf{B}};
\node[right] at (Y) {\textbf{Y}};
\end{circuitikz}
}
\end{minipage}
\end{frame}
\section{Binary addition}
\begin{frame}{Binary addition}
\begin{itemize}
\item Adding two 1-bit numbers:\\
\begin{minipage}{0.25\textwidth}
\only<1-2>{
\begin{tabular}{cc|cc}
A & B & Y &\\
\hline
0 & 0 & 0 &\\
1 & 0 & 1 &\\
0 & 1 & 1 &\\
1 & 1 & 10 &
\end{tabular}
}
\only<3->{
\begin{tabular}{cc|cc}
A & B & C & S\\
\hline
0 & 0 & 0 & 0\\
1 & 0 & 0 & 1\\
0 & 1 & 0 & 1\\
1 & 1 & 1 & 0
\end{tabular}
}
\end{minipage}%
\begin{minipage}{0.7\textwidth}
$\;$
\onslide<2->{
\\[1.5cm]$\leftarrow$ 2 bit output: \textbf{CARRY} and \textbf{SUM}
}
\end{minipage}
\item<4> Can be implemented with one AND gate and one XOR gate:
\begin{circuitikz}
\draw (0,0) node[xor port] (XOR) {{\hspace*{-0.0cm}\tiny XOR}};
\draw (0, -1.5) node[and port] (AND) {{\hspace*{-0.5cm}\tiny AND}};
\draw (XOR.in 1) ++ (-1,0) node (A) {};
\draw (XOR.in 2) ++ (-1,0) node (B) {};
\draw (XOR.out) ++ (0.5,0) node (SUM) {};
\draw (AND.out) ++ (0.5,0) node (CARRY) {};
\draw (A) to[short, o-] (XOR.in 1);
\draw (B) to[short, o-] (XOR.in 2);
\draw (OR.in 1) ++ (-0.5,0) to[short,*-] ([xshift=-0.5cm]AND.in 1) -- (AND.in 1);
\draw (OR.in 2) ++ (-0.3,0) to[short,*-] ([xshift=-0.3cm]AND.in 2) -- (AND.in 2);
\draw (XOR.out) to[short,-o] (SUM);
\draw (AND.out) to[short,-o] (CARRY);
\node[left] at (A) {\textbf{A}};
\node[left] at (B) {\textbf{B}};
\node[right] at (SUM) {\textbf{SUM}};
\node[right] at (CARRY) {\textbf{CARRY}};
\end{circuitikz}
\end{itemize}
\end{frame}
\begin{frame}{Full Adder}
\begin{overlayarea}{\textwidth}{\textheight}
If we want to add N-bit numbers we have to account for the carry bit of lower-valued digits\\
\begin{minipage}{0.35\textwidth}
{\small \begin{tabular}{ccc|cc}
\textbf{A} & \textbf{B} & \textbf{C}$_{in}$ & \textbf{C}$_{out}$ & \textbf{S} \\
\hline
0 & 0 & 0 & 0 & 0\\
1 & 0 & 0 & 0 & 1\\
0 & 1 & 0 & 0 & 1\\
0 & 0 & 1 & 0 & 1\\
1 & 1 & 0 & 1 & 0\\
1 & 0 & 1 & 1 & 0\\
0 & 1 & 1 & 1 & 0\\
1 & 1 & 1 & 1 & 1\\
\end{tabular}
}
\end{minipage}%
\begin{minipage}{0.7\textwidth}
\only<2->{
\begin{circuitikz}[scale=0.75]
\draw (0,0) node[xor port] (XOR1)
{{\hspace*{-0.0cm}\tiny XOR}};
\draw (2.5,-1) node[xor port] (XOR2) {{\hspace*{-0.0cm}\tiny XOR}};
\draw (4.75,-3.5) node[xor port] (XOR3) {{\hspace*{-0.0cm}\tiny XOR}};
\draw (2.5, -2.75) node[and port] (AND1) {{\hspace*{-0.5cm}\tiny AND}};
\draw (2.5, -4.5) node[and port] (AND2) {{\hspace*{-0.5cm}\tiny AND}};
\draw (XOR1.in 1) ++ (-0.75,0) node (A) {};
\draw (XOR1.in 2) ++ (-0.75,0) node (B) {};
\draw (XOR2.out) ++ (2.5,0) node (SUM) {};
\draw (XOR2.in 2) ++ (-3.25,0) node (CARRYIN) {};
\draw (XOR3.out) ++ (0.25,0) node (CARRYOUT) {};
\draw (A) to[short,o-] (XOR1.in 1);
\draw (B) to[short,o-] (XOR1.in 2);
\draw (CARRYIN) to[short, o-] (XOR2.in 2);
\draw (A) ++ (0.75,0) to[short,*-] ([xshift=-2.5cm]AND2.in 1) -- (AND2.in 1);
\draw (B) ++ (0.5,0) to[short,*-] ([xshift=-2.75cm]AND2.in 2) -- (AND2.in 2);
\draw (XOR1.out) |- (XOR2.in 1);
\draw (XOR2.in 1) ++ (-0.25, 0) to[short,*-] ([xshift=-0.25cm]AND1.in 1) --(AND1.in 1);
\draw (XOR2.in 2) ++ (-0.75, 0) to[short,*-] ([xshift=-0.75cm]AND1.in 2) --(AND1.in 2);
\draw (AND1.out) |- (XOR3.in 1);
\draw (AND2.out) |- (XOR3.in 2);
\draw (XOR2.out) to[short,-o] (SUM);
\draw (XOR3.out) to[short,-o] (CARRYOUT);
\node[left] at (A) {\textbf{A}};
\node[left] at (B) {\textbf{B}};
\node[left] at (CARRYIN) {\textbf{C$_{IN}$}};
\node[right] at (SUM) {\textbf{SUM}};
\node[right] at (CARRYOUT) {\textbf{C$_{OUT}$}};
\end{circuitikz}
}
\end{minipage}
\onslide<3>{
{Symbol for full adder}: \\
\hspace{4cm}
\begin{circuitikz}[scale=0.15]
\ctikzset{chips/scale=0.75}
\draw (0,0) node[dipchip, num pins=6, hide numbers, no topmark, external pins width=0, align=left, rotate=-90] (FULLADDER) {\rotatebox{90}{{\tiny 1 bit adder}}};
\draw (FULLADDER.bpin 3) ++ (0,2) node (A) {};
\draw (FULLADDER.bpin 1) ++ (0,2) node (B) {};
\draw (FULLADDER.bpin 5) ++ (0,-2) node (SUM) {};
\draw (FULLADDER.n) ++ (2,0) node (CARRYIN) {};
\draw (FULLADDER.s) ++ (-2,0) node (CARRYOUT) {};
\draw (A) to[short, o-] (FULLADDER.bpin 3);
\draw (B) to[short, o-] (FULLADDER.bpin 1);
\draw (CARRYIN) to[short, o-] (FULLADDER.n);
\draw (SUM) to[short, o-] (FULLADDER.bpin 5);
\draw (CARRYOUT) to[short, o-] (FULLADDER.s);
\node[left] at (A) {\textbf{A}};
\node[left] at (B) {\textbf{B}};
\node[right] at (CARRYIN) {\textbf{C$_{IN}$}};
\node[right] at (SUM) {\textbf{S}};
\node[left] at (CARRYOUT) {\textbf{C$_{OUT}$}};
\end{circuitikz}
}
\end{overlayarea}
\end{frame}
\begin{frame}{Building a N-bit adder}
\begin{itemize}
\item Adding two N-bit binary numbers:\\
\begin{tabular}{rccccc}
\textbf{A}: & & 1 & 0 & 1 & 1 \\
\textbf{B}: & & 1 & 1 & 1 & 0 \\
\textbf{CARRY}: & \onslide<9->{1} & \onslide<7->{1} & \onslide<5->{1} & \onslide<3->{0} & 0 \\ \hline
\textbf{SUM}: & \onslide<10->{1} & \onslide<8->{1} & \onslide<6->{0} & \onslide<4->{0} & \onslide<2->{1}
\end{tabular}
\item<11-> 4 bit \textbf{ripple carry adder}:\\[0.2cm]
\begin{circuitikz}[scale=0.9]
\ctikzset{chips/scale=0.65}
% adder 0
\draw (0,0) node[dipchip, num pins=6, hide numbers, no topmark, external pins width=0, align=left, rotate=-90] (FA0) {\rotatebox{90}{{\tiny 1 bit adder}}};
\draw (FA0.bpin 3) ++ (0,1) node (A0) {};
\draw (FA0.bpin 1) ++ (0,1) node (B0) {};
\draw (FA0.bpin 5) ++ (0,-1) node (S0) {};
\draw (A0) to[short, o-] (FA0.bpin 3);
\draw (B0) to[short, o-] (FA0.bpin 1);
\draw (S0) to[short, o-] (FA0.bpin 5);
\node[left] at (A0) {\textbf{A0}};
\node[left] at (B0) {\textbf{B0}};
\node[right] at (S0) {\textbf{S0}};
\node[above right] at (FA0.n) {{\tiny \textbf{C}$_{IN}$}};
\node[above left] at (FA0.s) {{\tiny \textbf{C}$_{OUT}$}};
% adder 1
\draw (-3,0) node[dipchip, num pins=6, hide numbers, no topmark, external pins width=0, align=left, rotate=-90] (FA1) {\rotatebox{90}{{\tiny 1 bit adder}}};
\draw (FA1.bpin 3) ++ (0,1) node (A1) {};
\draw (FA1.bpin 1) ++ (0,1) node (B1) {};
\draw (FA1.bpin 5) ++ (0,-1) node (S1) {};
\draw (A1) to[short, o-] (FA1.bpin 3);
\draw (B1) to[short, o-] (FA1.bpin 1);
\draw (S1) to[short, o-] (FA1.bpin 5);
\node[left] at (A1) {\textbf{A1}};
\node[left] at (B1) {\textbf{B1}};
\node[right] at (S1) {\textbf{S1}};
\node[above right] at (FA1.n) {{\tiny \textbf{C}$_{IN}$}};
\node[above left] at (FA1.s) {{\tiny \textbf{C}$_{OUT}$}};
% adder 2
\draw (-6,0) node[dipchip, num pins=6, hide numbers, no topmark, external pins width=0, align=left, rotate=-90] (FA2) {\rotatebox{90}{{\tiny 1 bit adder}}};
\draw (FA2.bpin 3) ++ (0,1) node (A2) {};
\draw (FA2.bpin 1) ++ (0,1) node (B2) {};
\draw (FA2.bpin 5) ++ (0,-1) node (S2) {};
\draw (A2) to[short, o-] (FA2.bpin 3);
\draw (B2) to[short, o-] (FA2.bpin 1);
\draw (S2) to[short, o-] (FA2.bpin 5);
\node[left] at (A2) {\textbf{A2}};
\node[left] at (B2) {\textbf{B2}};
\node[right] at (S2) {\textbf{S2}};
\node[above right] at (FA2.n) {{\tiny \textbf{C}$_{IN}$}};
\node[above left] at (FA2.s) {{\tiny \textbf{C}$_{OUT}$}};
% adder 3
\draw (-9,0) node[dipchip, num pins=6, hide numbers, no topmark, external pins width=0, align=left, rotate=-90] (FA3) {\rotatebox{90}{{\tiny 1 bit adder}}};
\draw (FA3.bpin 3) ++ (0,1) node (A3) {};
\draw (FA3.bpin 1) ++ (0,1) node (B3) {};
\draw (FA3.bpin 5) ++ (0,-1) node (S3) {};
\draw (A3) to[short, o-] (FA3.bpin 3);
\draw (B3) to[short, o-] (FA3.bpin 1);
\draw (S3) to[short, o-] (FA3.bpin 5);
\node[left] at (A3) {\textbf{A3}};
\node[left] at (B3) {\textbf{B3}};
\node[right] at (S3) {\textbf{S3}};
\node[above right] at (FA3.n) {{\tiny \textbf{C}$_{IN}$}};
\node[above left] at (FA3.s) {{\tiny \textbf{C}$_{OUT}$}};
% connection between adders
\draw (FA0) ++ (1, -1) node[ground] (GND) {};
\draw (GND) |- (FA0.n);
\draw (FA0.s) -- (FA1.n);
\draw (FA1.s) -- (FA2.n);
\draw (FA2.s) -- (FA3.n);
\draw (FA3.s) ++ (-0.5,0) to[short, o-] (FA3.s);
\end{circuitikz}
\item<12-> Note: propagation delay of full adders
\end{itemize}
\end{frame}
\section{Memory}
\begin{frame}{S-R latch}
\begin{minipage}{0.5\textwidth}
\begin{circuitikz}
\draw (0,0) node[nor port] (NOR1) {{\hspace*{-0.0cm}\tiny NOR}};
\draw (0,-3) node[nor port] (NOR2) {{\hspace*{-0.0cm}\tiny NOR}};
\draw (NOR1.in 1) ++ (-1, 0) node (R) {};
\draw (NOR2.in 2) ++ (-1, 0) node (S) {};
\draw (NOR1.out) ++ (1, 0) node (Q) {};
\draw (NOR2.out) ++ (1, 0) node (Qbar) {};
\draw (NOR1.out) ++ (0.0, -0.5) node (P1) {};
\draw (NOR2.in 1) ++ (-0.5, 0.5) node (P2) {};
\draw (NOR1.out) |- (P1.center) -- (P2.center) |- (NOR2.in 1);
\draw (NOR2.out) ++ (0.0, 0.5) node (P3) {};
\draw (NOR1.in 2) ++ (-0.5, -0.5) node (P4) {};
\draw (NOR2.out) |- (P3.center) -- (P4.center) |- (NOR1.in 2);
\draw (R) to[short, o-] (NOR1.in 1);
\draw (S) to[short, o-] (NOR2.in 2);
\draw (Q) to[short, o-] (NOR1.out);
\draw (Qbar) to[short, o-] (NOR2.out);
\node[left] at (R) {\textbf{R}};
\node[left] at (S) {\textbf{S}};
\node[right] at (Q) {\textbf{Q}};
\node[right] at (Qbar) { $\overline{\mbox{\textbf{Q}}}$};
\end{circuitikz}
\end{minipage}%
\begin{minipage}{0.25\textwidth}
\begin{tabular}{cc|ccl}
\textbf{S} & \textbf{R} & \textbf{Q} & $\overline{\mbox{\textbf{Q}}}$ &\\
\hline
0 & 0 & & &LATCHED \\
1 & 0 & 1 & 0 &\\
0 & 1 & 0 & 1 &\\
1 & 1 & & &UNDEFINED
\end{tabular}
\end{minipage}%
\begin{itemize}
\item Can be used to store 1 bit of information
\end{itemize}
\end{frame}
\begin{frame}{Gated latch}
\begin{circuitikz}
\draw (0,0) node[nor port] (NOR1) {{\hspace*{-0.0cm}\tiny NOR}};
\draw (0,-3) node[nor port] (NOR2) {{\hspace*{-0.0cm}\tiny NOR}};
\draw (NOR1.in 1) ++ (-1, 0) node[and port] (AND1) {{\hspace*{-0.0cm}\tiny AND}};
\draw (NOR2.in 2) ++ (-1, 0) node[and port] (AND2) {{\hspace*{-0.0cm}\tiny AND}};
\draw (AND1.in 1) ++ (-1, 0) node (R) {};
\draw (AND2.in 2) ++ (-1, 0) node (S) {};
\draw ($(R)!0.5!(S)$) node (EN) {};
\draw (NOR1.out) ++ (1, 0) node (Q) {};
\draw (NOR2.out) ++ (1, 0) node (Qbar) {};
\draw (NOR1.out) ++ (0.0, -0.5) node (P1) {};
\draw (NOR2.in 1) ++ (-0.5, 0.5) node (P2) {};
\draw (NOR1.out) |- (P1.center) -- (P2.center) |- (NOR2.in 1);
\draw (NOR2.out) ++ (0.0, 0.5) node (P3) {};
\draw (NOR1.in 2) ++ (-0.5, -0.5) node (P4) {};
\draw (NOR2.out) |- (P3.center) -- (P4.center) |- (NOR1.in 2);
\draw (EN) ++ (0.5, 0) node (P5) {};
\draw (EN) to[short, o-*] (P5.center);
\draw (P5.center) |- (AND1.in 2);
\draw (P5.center) |- (AND2.in 1);
\draw (R) to[short, o-] (AND1.in 1);
\draw (S) to[short, o-] (AND2.in 2);
\draw (Q) to[short, o-] (NOR1.out);
\draw (Qbar) to[short, o-] (NOR2.out);
\draw (AND1.out) -- (NOR1.in 1);
\draw (AND2.out) -- (NOR2.in 2);
\node[left] at (R) {\textbf{R}};
\node[left] at (S) {\textbf{S}};
\node[left] at (EN) {\textbf{EN}};
\node[right] at (Q) {\textbf{Q}};
\node[right] at (Qbar) { $\overline{\mbox{\textbf{Q}}}$};
\end{circuitikz}
\end{frame}
\begin{frame}{D latch}
\begin{circuitikz}
\draw (0,0) node[nor port] (NOR1) {{\hspace*{-0.0cm}\tiny NOR}};
\draw (0,-3) node[nor port] (NOR2) {{\hspace*{-0.0cm}\tiny NOR}};
\draw (NOR1.in 1) ++ (-1, 0) node[and port] (AND1) {{\hspace*{-0.0cm}\tiny AND}};
\draw (NOR2.in 2) ++ (-1, 0) node[and port] (AND2) {{\hspace*{-0.0cm}\tiny AND}};
\draw (AND1.in 1) ++ (-1, 0) node[not port] (NOT) {{\hspace*{-0.4cm}\tiny NOT}};
\draw (NOT.in) ++ (-1, 0) node (D) {};
\draw (D) ++ (0, -2) node (EN) {};
\draw (NOR1.out) ++ (1, 0) node (Q) {};
\draw (NOR2.out) ++ (1, 0) node (Qbar) {};
\draw (NOR1.out) ++ (0.0, -0.5) node (P1) {};
\draw (NOR2.in 1) ++ (-0.5, 0.5) node (P2) {};
\draw (NOR1.out) |- (P1.center) -- (P2.center) |- (NOR2.in 1);
\draw (NOR2.out) ++ (0.0, 0.5) node (P3) {};
\draw (NOR1.in 2) ++ (-0.5, -0.5) node (P4) {};
\draw (NOR2.out) |- (P3.center) -- (P4.center) |- (NOR1.in 2);
\draw (NOT.out) -- (AND1.in 1);
\draw (EN) ++ (2.5, 0) node (P5) {};
\draw (EN) to[short, o-*] (P5.center);
\draw (P5.center) |- (AND1.in 2);
\draw (P5.center) |- (AND2.in 1);
\draw (D) to[short, o-] (NOT.in);
\draw (D) ++ (0.5,0) node (P6) {};
\draw (P6) to[short, *-] ([yshift=-1cm]P6);
\draw ([yshift=-1cm]P6) |- (AND2.in 2);
\draw (Q) to[short, o-] (NOR1.out);
\draw (Qbar) to[short, o-] (NOR2.out);
\draw (AND1.out) -- (NOR1.in 1);
\draw (AND2.out) -- (NOR2.in 2);
\node[left] at (D) {\textbf{D}};
\node[left] at (EN) {\textbf{EN}};
\node[right] at (Q) {\textbf{Q}};
\node[right] at (Qbar) { $\overline{\mbox{\textbf{Q}}}$};
\end{circuitikz}
\end{frame}
\begin{frame}{Building a N-bit shift register}
content...
\end{frame}
\end{document}
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